Astable Multivibrator Measurement using Tektronix TDS2012B (100MHz 1GS/s)

Figure 1: Astable schematic utilizing LTSpice

The schematic is as shown in Figure 1. Please download LTSpice if you want to simulate this circuit. However, any Spice will do it as long as you can get the right component.

The circuit operation is based on the alternate switching between Q1 and Q2. In the actual implementation, the circuit will be based on the asymmetry involved between the left and the right circuits. In running the simulation, I have to inject initial condition of 0 V. This will ensure the transition between 0 V to 9 V for the power supply.


Assuming Q1 to be in saturation, the collector voltage VC1 will be at VCEsat, which is assumed to be close to 0 V. Hence, the signal gets coupled to the base of Q2 causing the transistor to be off. The capacitor voltage will be charged up through transistor Rb1 from  approximately -8.0 V to 1 V as can be seen from the blue curve shown in Figure 2.  At t = 55 ms, Q2 starts to turn on causing the complete discharge of C2 (due to VCE2 driven to 0V). Now, Q2 is in saturation whereas Q1 is in the cutoff region.  

Theoretically, we can calculate the period to be 
  

T = 0.7*(Rb1 C1 +  Rb2 C2),                                             (1-1)

for general case assuming non-symmetrical in terms of the duty cycle.

 The simulation results are as shown in Figure 2, in which 4 terminals were probed, i.e. bases and colectors of Q1 and Q2, respectively.

Figure 2: Simulation Results using LTSpice

This is measured at the base of Q1. The base is connected to C2 and Rb1. The electrolytic capacitor, C2 is measured at 10 uF using UT603 LCR meter. The measured resistance, Rb1 is measured at 100 kOhms using Fluke 187 multimeter. Note that Figure 4 exhibit anomaly in charging up C1. This is due to in implementation, we have reversed the polarity of the electrolytic capacitors. The reason why it did not occur on the Q2 is unknown at this point in time.

Figure 3: Voltage level at the base of Q1

Figure 4: Voltage level at the collector of Q1

Figure 5: Voltage level at the base of Q2

The correction has been made for the electrolytic capacitors (it was made on purpose to investigate the effect of polarity) and Figures 7-10 illustrated the measured results.

Figure 6: Voltage level at the collector of Q2